Russian Electronics: Semiconductor and Processors

https://sdelanounas.ru/blogs/146786/

Micron, a resident of the Moscow Technopolis special economic Zone, has released an experimental batch of the first fully domestic microcontroller based on the RISC-V open architecture, which will allow the production of devices and devices to reduce dependence on foreign component bases and licenses.

Microcontroller is a basic component of electronic equipment, used in consumer and industrial electronics: engineering infrastructure systems, sensor networks, telecommunications equipment, measuring devices.

The new microcontroller can be used for industrial automation and the Internet of Things, smart home, infrastructure and security systems, telemetry and monitoring, metering devices, fuel and energy complex, transport, medicine, trade, road infrastructure and devices, housing and communal services and other areas. It is a universal basic unit for import substitution in domestic electronics

The open architecture allows developers and manufacturers not to depend on patent holders when creating and developing new electronic devices and modules, which reduces the dependence of Russian electronics on foreign technologies and components.

"Micron Company has been a resident of the SEZ since 2015 "Technopolis Moscow is part of the microelectronics cluster and produces more than 4 billion chips annually. The resident's production facilities for the production of microcontrollers on the territory of the Moscow SEZ allow us to fully cover the current needs of Russian manufacturers. This can be considered a significant step for the domestic instrument industry, " said Gennady Degtev, General Director of the Moscow SEZ.

Fully Russian microcontroller with a core based on the open RISC-V architecture-32-bit MK32 AMUR developed by NIIMA Progress has built-in cryptographic protection and allows its full use in critical infrastructure and objects with high security requirements.

"The Russian component base of the first level is now available to developers of OpenSource solutions in general, and the RISC-V ecosystem in particular. The first sample plates have already been received and are undergoing the necessary tests. MK32 AMUR is the first fully domestic RISC-V microcontroller: the entire development and production cycle is carried out in Russia. Today, we already see a high level of market interest, with more than 200 requests received from manufacturers of various equipment: metering devices, telemetry, cash registers, medical equipment, road infrastructure, and robotics. And we have implemented the possibility of placing an order with a choice of the contract period and delivery terms, starting from October 2022, for everyone who is interested in localizing their devices and devices in the RISC-V ecosystem," said Gulnara Khasyanova, General Director of Micron JSC.

He is being a petulant retarded idiot. He is comparing apples with oranges and also makes all sorts of nonsensical comparisons which aren't even chalk with cheese.

I will give you an example. He dismisses SPEC CPU as a benchmark and claims 7-zip and Blender benchmarks are more important to gauge performance. Well guess what. SPEC CPU is what we call a composite benchmark. You run a whole suite with a bunch of benchmarks and then compute an aggregate composite number. A single number which roughly describes performance on average for a whole set of applications. SPEC CPU has a compression benchmark (gzip) and ray tracing benchmark (ray) in the suite. The compression benchmark is roughly what 7-zip does, and the ray tracing one is roughly what Blender does. He claims focusing on a single benchmark is better. Well it isn't. You always look at composite benchmarks to gauge general purpose usability. You go into application specific benchmarks if that application matters to you.

As for the merits of VLIW vs OoO architecture processors. These are well known. OoO is better than VLIW at branch heavy multi-threaded applications with thin compute per thread. And VLIW is better than OoO for technical compute where you need to perform a lot of arithmetic operations. The major benefit of VLIW is that you reduce the amount of transistors in the die used for control and branch prediction and the like and then you can use those to make more functional units instead. The problem with VLIW is that in applications where parallelism is hard to extract the performance craters more quickly. But that is only the case because a VLIW processor is typically wider than an OoO processor made with similar manufacture process and transistor budget. Once you get to wider OoO processors you start bumping into the same issues.

Elbrus was originally designed as a supercomputer processor. It was used on the Don2 radar for example. Elbrus2K comes from that and is well suited for both technical compute and workstation purposes. Also well suited for aircraft avionics like for radar signal processing or other data parallel tasks. Now, if you want to run multi-threaded Java apps, or SQL databases, it won't be as good as an OoO processor designed with the same resource base. Because of the reasons I mentioned. But this is when we talk about traditional VLIW processors. The fact is, I do not even know the specific minutia of how the latest Elbrus2K architecture works. In theory there is no reason why you can't put dynamic scheduling on VLIW just like you can on an OoO processor. One way to do it is to have a software dynamic scheduler. The Transmeta CPUs did this. Another way is to add specific hardware support for branch prediction, instruction reordering, speculation, and the like. Itanium CPUs tried to go this route.

Given the Russian resource base, where they have older manufacturing processes, the VLIW design makes sense. And the military and technical applications typically used by the design are suitable for it. It this was a processor designed for a bank or a web services company then they wouldn't have chosen that kind of design.

He also does other nonsensical comparisons. He keeps comparing the IPC of things which are not comparable. Like x86 and Elbrus2K processors made with different semiconductor budgets with different transistor budgets.

The difference in clockspeed is kind of irrelevant. Typically wider processors, like Elbrus2K, have lower clockspeeds but compensate for it with more peak instructions per cycle. What matters is how many instructions you can compute per second. Comparisons with AMD Epyc are nonsense. Made with different process and multiple chiplets. If you made an Elbrus processor with similar manufacture resources the Elbrus2K would be way wider than the AMD x86 one.

The only things he mentions which I can relate with is are lack of availability of the hardware for consumers to buy and lack of openly available compilers and tools. This was also a problem with Itanium. I can sort of understand it since this is the secret sauce of MCST. But it will cause problems for the success of the architecture itself in the long run.

I can also relate that he is comparing two things he supposedly can buy. But, the thing is, for the military they need to buy things made in Russia. And given the types of applications the military needs, Elbrus is the ideal processor and design for them. Baikal does not even design their own CPU cores. So I do not consider them to be on the same playing field as MCST. Not in a long shot.

Russia has a fabless semiconductor company which designs RISC-V cores for licensing to third parties. So you could say this is the embryo of a Russian ARM like competitor. In the long run this company should have good chances for embedded applications and who knows what else. The Mikron manufactured embedded chip mentioned a couple posts above uses one of their core designs.

https://syntacore.com/

I think companies like Baikal will have no future in the new conditions where Russia can't access foreign semiconductor fabs.

There was/is similar software in the US for binary translation. Digital Equipment Corporation used to have something called FX!32 which was used in Windows NT for Alpha processors. It translated x86 Windows applications to run on Alpha Windows. Apple had something similar, called Rosetta, which they bought to translate PowerPC applications to run on x86. I assume the latest Apple Macs, the ones with the M1 chip, use something similar to run x86 Mac applications on ARM Macs.

MacOS X is derived from the NeXTSTEP operating system. So it has something called "fat binaries". You can compile a composite binary targetted at multiple CPU architectures. And when you click to run the binary on the operating system it selects the binary most appropriate for your computer. Later versions of Windows also have something similar.

On top of that you have Rosetta 2, which can either translate a x86 binary into an ARM one when the application is installed, or JIT compile a X86 binary so it can run on an ARM platform.
Of course MacOS X itself only does this for running MacOS X86 platforms on MacOS ARM platforms.

To run a Windows application on a Mac you used to need something called Parallels, which was a machine emulator, installed.
When the CPU was an x86 that was probably pretty trivial. You still needed a copy of Windows to install on the emulator. It was probably something kind of like VMWare. Now that Apple moved to ARM I don't know how you can run a Windows application on a Mac.

Video about Elbrus and the prospects of computing in Russia in the current situation.