lancelot wrote:65nm on 200mm wafers is enough for current Russian military requirements. But if they want to produce products to replace government civilian chips on servers and routers then it is not enough.
Except Elbrus 8SM and newer (Elbrus 1SM, Etc) are 28nm and Elbrus 16 is also 14nm or so. But all TSMC built. Military ones are built locally but on 65nm.
Yes, the Elbrus-16S requires 16 nm lithography.
I looked at http://mcst.ru/elbrus-8sv and they doubled the FP performance by increasing the SIMD register width from 64 to 128 bits.
This required and increase of transistors from 2.73 to 3.5 billion without any changes in cache size. The same instruction latency
was retained. This is a rather small number of transistors for such a big gain in performance. I would think that using 256 and
eventually 512 bit SIMD register widths would be rather feasible and not outlandish.
So an Elbrus-MAX with 512 bit SIMD registers would be around 10 billion transistors. The only cost is die size
and heat. A die shrink from 28 nm to 14 nm would be the right move. So instead of 288 Gigaflops for FP64 we would
have over 1500 GFlops if the clock can be increased with a smaller lithography process. This would make the Elbrus-16
a leading design in terms of FP.